In the overall power system, the linear regulator (LDO) is like cufflinks to a well-tailored suit: both complement each other and are indispensable. A simple, small-sized, low-noise, and low-quiescent current LDO is an essential component in medium-to-low-power applications. Richtek provides a selection of over one hundred LDOs, with input voltages ranging from 0.8V to 80V and output currents ranging from 0.02A to 4A. These LDOs can meet the diverse requirements of battery-powered devices, automotive and industrial applications, and more.
▸ Output Voltage
Richtek offers a variety of LDOs with different output options, such as high flexibility by adding a voltage divider resistor, set directly through PCB layout connections, or with fixed voltage output.
▸ Output Current
To meet application requirements, power consumption: load current x (input-output) voltage must also be considered.
▸ Package & Power Consumption
The commonly used SOT-23-5 package is suitable for 0.3W power output, while the PSOP-8 package can handle up to 0.9W power output. *
* Testing conditions are based on normal PCB layout (where the PCB cooper foil connected to the chip pins is slightly larger than the pins and heat sink), with a PCB ambient temperature of 60°C and a chip junction temperature of 125°C.
▸ Power Supply Rejection Ration
The LDO PSRR value quantifies how well the LDO can reject input supply ripple at a certain frequency to keep the output voltage free of noise and ripple. PSRR is related to the system gain frequency. At low frequencies below 10kHz, the LDO has a high open-loop gain and can effectively suppress ripples. When the unity gain frequency is exceeded, the LDO can no longer eliminate ripples. Therefore, the ripple attenuation at high frequencies is mainly achieved through the LDO output capacitor and its internal parasitic capacitance.
▸ Low quiescent current （<15uA）
Quiescent current refers to the current consumed by the feedback control and driving circuit inside the IC, which can be measured by measuring the current flowing through the LDO's ground pin. If power consumption during sleep mode becomes critical for a battery-powered application, a LDO with low quiescent current can be chosen.